Latches, Flip-Flop and Pewaktu (Timer)

 Latches

The output of a latch depends on its current inputs and on its previous output and its change of state can happen at any time when its inputs change. 

1. S-R (Set-Reset) Latch 

Active-High Input S-R Latch 


Active-LowInput S-R Latch 



2.Gated S-R Latch 

A gated latch requires an Enable input, EN (G is also used to designated an enable input). The S and R inputs control the state to which the latch will go when a HIGH level is applied to the EN input. The latch will not change until EN is HIGH.




3.Gated D Latch

Only has one input in addition to EN. This input is called the D (data) input. -When the D input is HIGH and the EN input is HIGH, the latch will SET. 

-When the D input is LOW and EN is HIGH, the latch will RESET. 

-Another way, the output Q follows the input D when EN is HIGH


Edge-Triggered Flip-Flops

 1.Edge-triggered S-R flip-flop  

The S and R inputs of the S-R flip-flop are called synchronous input because data on these inputs are transferred to the flip-flop’s output only on the triggering edge of the clock pulse.


Operation of a positive edge-triggered S-R flip-flop





2.Edge-triggered D flip-flop
The D flip-flop is useful when a single data bit (1 or 0) is to be stored. 


3.Edge-triggered J-K flip-flop

The J-K flip-flop is versatile and is widely used type of flip-flop. The difference is that he J-K flip-flop has no invalid state as does the S-R flip-flop.










The 555 Timer










1.Monostable (one-shot) operation


2.Astable operation



Nama : Dimas Cahyo Ramadhan 

Kelas : 2F 

NIM : 2003015077 

Matakuliah : Sistem Digital dan Gelombang

sumber : https://onlinelearning.uhamka.ac.id

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